

How ChipIN Centre is bringing centralized chip-design and fabrication facilities and specialized training to engineers across the country
By Vivian Desalphine

A new chip can begin as an idea in the mind of a student, researcher or entrepreneur. But taking that idea from concept to silicon requires expensive software, powerful computers, trained experts and access to a semiconductor foundry. Most colleges and start-ups cannot afford all this on their own.
The ChipIN Centre, set up by the Ministry of Electronics and Information Technology (MeitY) at C-DAC Bengaluru, is helping remove these barriers through shared national infrastructure and chip-design support. By providing secure online access to costly resources from one place, it avoids the need for every college to buy expensive tools and build separate infrastructure.
More than 1 lakh engineers from 500 organizations, including 400 academic institutions and 100 start-ups, have joined this shared platform of ChipIN Centre, creating the largest user base for a centralized chip-design facility.
In practice, ChipIN brings a professional chip-design laboratory to a student’s doorstep. A student far from a technology hub can use the same advanced software available to leading institutions. This democratizes chip design, allowing talent and ideas, rather than geography or financial strength, to determine who can participate.
ChipIN provides access to advanced Electronic Design Automation (EDA) tools used to design a chip, test its circuits and check whether it can be manufactured. It also offers powerful computing, reusable design blocks and standard design methods. The PARAM Utkarsh supercomputer supports complex simulations, while the national pre-silicon validation platform helps test designs before manufacturing.
Tools alone cannot solve every problem. One small error can cause a chip to fail. ChipIN therefore provides training, technical support and fabrication-compliance checks. Its experts examine whether a design follows the foundry’s rules, whether its parts are correctly connected and whether it is ready for manufacturing. Designers receive feedback and revise their work until it meets the required standards. The clearest example of democratization is the Multi-Project Wafer (MPW) service, an approach also used by Europractice in Europe and MOSIS in the United States. Since making a full semiconductor wafer is costly, ChipIN checks designs from many institutions and places them together on one wafer. Each institution uses a small part and shares the cost. The wafer is manufactured at the Semi-Conductor Laboratory (SCL) in Mohali, and the finished chips are returned to their designers for testing.
Eight such shared-wafer runs have carried 205 designs from institutions to SCL Mohali. ChipIN has also enabled more than 100 tape-outs at overseas foundries. A tape-out is the stage at which a completed design is sent for manufacturing. The programme has reached around one lakh students and engineers and recorded more than four crore hours of design-tool use, showing that chip design is moving from classroom learning towards real-silicon experience.
The benefit goes beyond numbers. A student can experience the journey from an idea to a working chip. A professor can teach practical design without building a costly laboratory. A start-up can test an idea while saving funds for product development. Industry gains engineers who understand real design and manufacturing requirements.
India’s semiconductor ambitions require both fabrication capacity and people capable of designing the chips those fabs will manufacture. By consolidating tools, computing, training, expert support, compliance checks and fabrication access, ChipIN is turning scarce resources into shared national capability. By bringing chip-design infrastructure to every doorstep, ChipIN is ensuring that India’s next breakthrough chip can emerge from any classroom, laboratory or start-up anywhere in the country.
(The Author is Scientist-F, C-DAC Bangalore)





















